A MRAM is a promising nonvolatile memory from the viewpoint of a high integration and a high speed operation. In the MRAM, a “Magnetoresistive element” showing a magnetoresistance effect such as a TMR (Tunnel MagnetoResistance) effect is used as a storage element. The magnetroresistive element includes two ferromagnetic layers and a nonmagnetic layer held between the two ferromagnetic layers. One of the two ferromagnetic layers is a magnetization pinned layer (pinned layer) whose magnetization orientation is fixed, and the other is a magnetization free layer (free layer) whose magnetization orientation can be inverted.
When the magnetization orientations of the magnetization pinned layer and the magnetization free layer are “anti-parallel”, a resistance value (R+ΔR) of the magnetroresistive element is greater than a resistance value (R) when they are “parallel”, due to the magnetoresistance effect. A memory cell of the MRAM uses the change in its resistance value and consequently stores data in a nonvolatile manner. For example, a high resistance state is correlated to “1”, and a low resistance state is correlated to “0”. The data of the memory cell can be read by detecting the resistance value of the magnetroresistive element. On the other hand, the data of the memory cell can be rewritten by inverting the magnetization orientation of the magnetization free layer.
FIG. 1 shows a part of a circuit configuration of a MRAM described in Japanese Patent Publication No. JP-P 2004-348934A. A plurality of writing word lines 103W and a plurality of reading word lines 103R are provided to extend in an X-axis direction and connected to an X-selector 108. Also, a plurality of first bit lines 104 and a plurality of second bit lines 105 are provided to extend in a Y-axis direction and connected to a Y-selector 111.
A memory cell array 110 includes a plurality of memory cells 120 arranged in an array shape. Each memory cell 120 includes a transistor 106 and a magnetroresistive element 107. A gate of the transistor 106 is connected to the writing word line 103W. One of the source/drain of the transistor 106 is connected to the first bit line 104, and the other is connected to the second bit line 105. One end of the magnetroresistive element 107 is connected to the reading word line 103R, and the other end is connected to the second bit line 105.
Some of the memory cells 120 are used to generate a reference current when data is read. The foregoing memory cell is hereinafter referred to as a reference cell 120r. Also, the first bit line 104 and the second bit line 105, which are connected to the reference cell 120r, are referred to as a first reference bit line 104r and a second reference bit line 105r, respectively. A current sense amplifier 115 is connected to the Y-selector 111 and the second reference bit line 105r. 
The data reading from a certain memory cell 120 is carried out in the following procedure (hereinafter, the memory cell 120 from which the data is read is referred to as a “selected memory cell 120s”). The X-selector 108 selects one reading word line 103R connected to the selected memory cell 120s and applies a reading voltage to the reading word line 103R. The Y-selector 111 selects one second bit line 105 connected to the selected memory cell 120s. Based on a difference between a voltage of the current sense amplifier 115 and a voltage of the reading word line 103R, a detection current Is flows through the selected second bit line 105. The value of the detection current Is depends on the resistance state of the magnetroresistive element 107 in the selected memory cell 120s. Also, a reference current Ir flows through the second reference bit line 105r connected to the reference cell 120r. 
The current sense amplifier 115 determines the data recorded in the selected memory cell 120s based on the detection current Is and the reference current Ir. For example, let us suppose that the data of the reference cell 120r is fixed to “0”. In that case, if the detection current Is and the reference current Ir are approximately equal, the current sense amplifier 115 judges that the data of the selected memory cell 120s is “0”. On the other hand, if the detection current Is is smaller than the reference current Ir, the current sense amplifier 115 judges that the data of the selected memory cell 120s is “1”.
Here, the point to be noticed is an existence of a flowing current that does not pass through the selected memory cell 120s. The MRAM shown in FIG. 1 has a cross point array configuration in which the memory cells 120 are connected to each other through many parallel routes. When the data is read from the selected memory cell 120s, the current that does not pass through the selected memory cell 120s flows on the parallel routes. The current is hereinafter referred to as “wraparound current”. This wraparound current has influence on the detection current Is flowing through the selected second bit line 105. That is, the wraparound current reduces the reliability of the data judgment with regard to the selected memory cell 120s. In order to increase the reliability of the read data, it is important to suppress the influence of the wraparound current.
Japanese Patent Publication No. JP-P 2002-8369A also describes a cross point cell array. According to the technique described in this literature, in order to increase the reliability of data to be read, when the data is read, a voltage Vs applied to the selected bit line and a voltage Vns applied to the non-selected bit line are made equal. However, it is actually difficult to make the voltage Vs and the voltage Vns perfectly equal.
One reason why it is difficult to make the voltage Vs and the voltage Vns perfectly equal lies in a voltage drop caused by a wiring resistance and a voltage drop between a drain and a source, on a route through which the read current flows. The influence of these voltage drops disables the voltage Vs and the voltage Vns to be sufficiently controlled by a current sense amplifier.
Japanese Patent Publication No. JP-P 2004-523055A discloses a technique whose object is to avoid the voltage drop caused by a reading current in a column multiplexer of a semiconductor memory device. In the technique described in this literature, although the voltage at the end of a bit line can be controlled, the influence of the voltage drop caused by the reading current in the bit line cannot be removed. This implies that the voltage, which is applied to a cell at a time of a reading operation, cannot be sufficiently controlled by the current sense amplifier.
In order to avoid the voltage drop caused by the reading current in this wiring resistance, a method of setting the resistance of the magnetroresistive element high and decreasing the reading current is considered. However, this involves a problem that a reading speed is made slow.
Avoiding the voltage drop caused by the reading current in the wiring resistance is important in improving the reliability of the reading, even in the object other than the decrease in the wraparound current. For example, when a reading circuit supplies a constant voltage V1, detects the reading current flowing through the magnetroresistive element and then judges the storage state, a reading voltage V2 applied to the magnetroresistive element is lower than V1 by a voltage drop ΔV caused by the reading current in the wiring resistance and the transistor. The voltage drop ΔV is changed, depending on the storage information of the magnetroresistive element. It is assumed that the voltage drop is assumed to be ΔVL when the magnetroresistive element is in a low resistance state and the voltage drop is assumed to be ΔVH when the magnetroresistive element is in a high resistance state. Then, with regard to an absolute value, ΔVL is larger than ΔVH. In short, in the low resistance state, the reading voltage tends to be low because of the influence of the voltage drop, and the reading current tends to be decreased. Thus, with the influence of the voltage drop caused by the wiring resistance and the transistor, the difference between the reading current in the low resistance state and the reading current in the high resistance state is reduced, thereby reducing the reliability of the reading.